Shure Level Loc Compressor

Stompboxes circuits published in magazines, books or on DIY electronics websites.
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bow_and_error
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Post by bow_and_error »

Has anybody played around with the Shure Level Loc Compressor circuit before? I has popped up on a few pro audio forums (here & here) and I was surprised to see that it runs on a 9V single supply.

I cut out just the compressor part from irfrench's 500-series version & built it up on the breadboard. Holy squish!!! This thing is like a tone trampoline. It clamps down HARD on the signal & has a much less transparent "crunch" to it than other FET compressors like the Rothwell Love Squeeze or Jon Patton's Bearhug. It definitely is noisy & has some distortion with the Input knob cranked, but moderate compression levels seem to be decently quiet.

The original schematic has transformer-based microphone IO & some other weird garbage, and I don't know how to determine the input or output impedance of the circuit, so I added input & output buffers, which seemed to make the response more predictable. I didn't have any 2N5089 or 2N4403 left, so I used BC549C and 2N3906. Not sure if changing those would help with the noise level. Any better ideas before I solder it up on perfboard?
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Post by stolen »

Hi! This is a very cute circuit, we didn't know about it yet, thanks!

We noticed three tiny things in your drawing around Q4: R18 is 22k in the original, in your version that stage is unity-gain instead - since your squish is already strong enough, you might just leave it like that. C8 however is back-biased, you might wanna flip that. R25 is 2.2k instead of 22k, in your version the stage has a gain of about -0.5, so if you're happy with your output levels you could just leave that stage out; this would also result in the output being in phase with the input (right now it's inverted), so if you wanna add a dry blend at some point that might help.

The input impedance depends on the position of the input gain pot and how much the FET is clamping at any point in time, but it's generally between 50k and 20k, so the input buffer is a good idea. The output impedance at the Q6 collector is approximately 10k, so the buffer is not needed for guitar applications but is still useful if you wanna run it into a mixing console.

We don't see anything that makes this circuit particularily noisy other than its topology; sure, low noise transistors and bias current optimisation could help a little, but at the end of the day the early position of the input level control means that the high gain amplifier is always cranked. It makes sense from a distortion viewpoint (FETs as variable resistors work up to 100mV signals or so, above that they turn into variable current sources, in this configuration this would result in higher differential gain above this threshold). Decreasing the value of R18 as proposed above would make the proplem worse. If however your noise changes a lot when rotating the input gain, something before that in your chain might be the culprit. How does it perform with the input grounded?

As for mods, there's two things we'd try if we were to build this circuit:
- add a 1M resistor between Q1 drain and gate. This is a pretty standard trick to increase linearity of FETS when used as variable resistors. It should clean it up a little bit; you might like it or not, but while it's on breadboard it's worth a quick try. Also it changes the envelope a little bit.
- add a 20k potentiometer as a variable resistor in series with the drain of Q1. This acts as a ratio control so you can get less squishy sounds out of it.

Have fun :D!

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Post by bow_and_error »

Big thanks, Stolen!

Your suggestion to flip the polarity of C8 actually solved the problem I was having with my perfboard build. I had gone through and confirmed every single part & track, and flipping that capacitor brought it to life. I really appreciate you taking a close look and helping me better understand the circuit.

I tested your suggestions on the breadboard and here's what I found:

- R18 - With 22k instead of 330R it sounded like the increased gain resulted in the signal being over the threshold all the time & the effect disappearing. 750R seems to give the input control a wider range of compression levels, but I'm going to play around with it a bit more.
- R25 - The output volume is already about unity, and it increases quite a bit with the stock 2.2k subbed in. I may think about putting that on a switch or something in case I want to output a line-level signal in the future. Interesting to know that stage is inverting as I didn't realize that's what happened to transistor stages with negative gain values.
- 1M resistor between Q1 Drain & Gate - This seems to make the compression more stable at high input levels, but resulted in weird intermittent signal dropout at low & medium input levels. Should this resistor value match that of the Gate resistor or can I try other values to linearize?
- Pot as a variable resistor on Q1 Drain - This was actually quite interesting in that it somewhat tamed the clamping limiter sound, but I think I'll have to play around with much lower pot values - maybe 1-5k.

I recorded a crude demo direct into my interface. It's mostly heavy limiter settings, but you can hear the interesting attack & release characteristics.

A problem I'm still having is with distortion at higher input levels. Unfortunately, I like the high compression sound that high input levels bring, but it starts to clip (especially in the high frequencies). Any suggestions on how to determine which stages are causing that distortion?

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Post by stolen »

Hi!

unfortunately we didn't bring our headphones today, we will listen to your sample later when we have access to them :D!

About the linearization resistor: We didn't pay attention, it's our fault, sorry! The stage is AC coupled, so that the additional resistor shifts the bias of C1, the signal dropout should come from the signal drifting out of range of the successive stages, which causes the signal to disappear. Uhm - we'll need to think a minute about how to resolve that properly, and we need to get some paid work done today first, will come back to you about that :D! But yeah, in theory it should be equal to the gate resistor and apply 1/2 of the input signal to the gate. If you're interested in the details, you can check out the section "FETs as variable resistors" in The Art of Electronics, you should be able to find an old edition as a free pdf online easily if libraries are currently closed in your area - long story short, it compensates for the square law of FETs in the low voltage region. This is however quite a soft clipping, we suspect that it doesn't help much with the distortion you have issues with.

About distortion: Since you use the common emitter amplifiers with a different gain than originally, they are now probably misbiased. In your circuit, Q4-Q7 all are common emitter amps (Q2 and Q3 are a discrete darlington buffer, they should be fine as they are). Let's go through how they work quickly so you can understand how to fix it (all from the perspective of NPNs):

- Base and emitter form a diode, as is hinted in the circuit symbol. The input signal is applied at the base, and as long as some forward current flows through this diode, the emitter signal is pretty much identical to the base, except for the typical diode voltage drop of 0.6-0.7V for silicon. In case of Q4, R17 guarantees that saturation as long as the base is more than a diode drop above ground.

- In a first approximation, the current flowing into the base is mirrored to the collector, multiplied by a transistor parameter called beta or hfe, which is typically around 100-1000 for standard transistors. If we don't look too closely, we can therefore say that the emitter current is basically identical to the collector current, and the base current is a small fraction of that. If we'd tie the collector directly to +9V, this would form a simple buffer, a so-called emitter follower; it's a buffer since the emitter voltage follows the base voltage, but almost all the current that following stages might draw from the emitter output is supplied by the collector, and the base signal is only marginally loaded. This works as long as the collector is at a higher voltage than the emitter, above that clipping occurs. Actually, there's some soft clipping before that, but we'll ignore that for now.

- As you can see, for Q4 the collector isn't tied directly to +9V, but there's R18 in the way - since we neglect base current, all the current flowing through the emitter resistor also flows through the collector resistor! This means if the collector resistor is twice the emitter resistor, there's twice the voltage across it - we built an amplifier, and gain simply -R18/R17. The minus sign comes from the fact that the emitter resistor's more negative side is tied to a voltage source, whereas it's the opposite for the collector resistor. This is just a simple first approximation, there's a bunch of side effects that should be taken into account for exact calculation, but for a rule of thumb it's good enough.

- Since the collector must be at higher voltage than the emitter, the original signal and the amplifier have to "share" the same headroom: This means for an amplifier with a gain of -2 for example you might want the emitter to swing between 0 and 3 volts and the collector between 3 and 9 volts, so that the available supply voltage is used optimally. Therefore we'd like the emitter to be biased at around 1.5V, and do that by biasing the base to around 2.2V. Often the bias voltage divider is connected to ground at one end, but on the other end it's hooked up to the collector instead of +9V - this is done to make the actual output bias a bit less dependent on the temperature dependent diode drop, and is often called autobias. It also decreases gain since it introduces negative feedback, but we won't worry about that here.

You could go ahead and calculate the values, but since you've already got the circuit on breadboard you can just measure: The collector voltages should be:
Q4: 6.7V
Q5: 5V
Q6: 7.5V
This needn't be precise, if you're within +-0.3V that's perfectly fine. We'd recommend adjusting the collector-base resistors R15, R19 and R23 to get to the desired value. Also, since Q6 is at lower gain than Q5, it actually restricts the headroom of the circuit. You might also consider running Q4 with less idle current and replace both R17 and R18 by maybe 1k or 2.2k resistors, whichever you have at hand.

We're not sure how willing you are to change the circuit topology, but if it was us we'd grab the signal for Q6 from Q4 instead of Q5, increase the gain of Q6 and put a volume pot in between - this way, the noise from Q6 will always be present regardless of output volume, but Q5 is the first stage that would clip and this way it would only affect the side chain. Q6 could have the same configuration as Q5, but since there's a volume pot before it it would be possible to reduce its input gain.

Wow this got way longer than expected. Sorry for rambling. Will listen to your sample later and come back about linearizing the FET!

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Post by bow_and_error »

Man, this is excellent learning for me! I don't have much experience with BJT circuits, so I'm reading up on the math now. I am going to do some book learning and come back to this post tomorrow once I understand a bit more about the gain & biasing of common emitter amplifiers.

I also figured out why my Spice simulation wasn't working. It turns out "M" is the prefix for micro, not mega (which is MEG). Now that I've fixed that, my simulation fits much more closely with the breadboard voltages. I've uploaded my fixed Spice model here.

The collector voltages should be:
Q4: 6.7V - mine is 4.8V on BB, 4.6V on Spice
Q5: 5V - mine is 4V on BB, 3.9V on Spice
Q6: 7.5V - mine is right around this, at 8V on BB, 7.5V on Spice

I see what you're saying about the high gain of Q5 and lower gain of Q6. I'm going to have to experiment with taking the output from Q5 on the breadboard instead of Q6. Would that affect the downstream sidechain elements of Q7-Q9?

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Post by stolen »

Hi!

sorry for taking a bit longer, things happened (tm); also we couldn't figure out an elegant solution for the FET linearization that doesn't affect the envelope of the compressor - it would be possible to increase C1 a lot (maybe a 22u electrolytic, with + towards Q1) and put a small (22n) cap in series with the drain-gate resistor, but that would introduce another time constant which would probably have negative side effects. We wouldn't go for it, especially since after listening to your sample the bulk of the distortion doesn't come from there. Great playing by the way, we really enjoyed that lick :D!

Yeah, BJT biasing is a thing that seems scary at first but is actually not too hard once you throw away all the smaller influences and just account for them in the field/simulation. Putting it in spice is a great idea, that way you can see how symmetrical your headroom is (just throw a big sine in there and check if clipping occurs approximately equally for both half waves - you might wanna disconnect C10 on either end for that to disable the compressor action). Ah yes, ye olde M - it's terrible :D. Honestly we just eyeballed the bias values, if you check them in the simulation you might find better points.

Be aware however that the simulation can fool you - it assumes a fixed beta value for all transistors. If you look into the 2n5089 datasheet, you can see that it is rated with a range from 400 and 1800 (it's called hfe in our copy)! Making your circuit inert to variations in beta is not hard however - just make sure that with no input signal the current flowing into the base of each transistor is much less than the current flowing in the bias voltage divider. If that isn't the case, increasing the emitter resistor (along with the collector resistor to retain the same gain) usually fixes that. Decreasing the bias voltage divider resistors works too, but decreases input impedance.

Oh, we must've been a bit confusing about the topology change, apologies - the idea is this: Q5 is the only element in the audio path that introduces significant gain and therefore is most likely to clip. However, it doesn't need to be in the audio path at all, the compressor action stays the same if it's only in the sidechain - If we would connect the positive end of C9 to the collector of Q4, this wouldn't affect the compression sidechain, but if Q5 clips that distortion is no longer on the output signal. Naturally, by doing that, we have lost significant signal strength since there is almost no makeup gain in the circuit, the output signal would be very weak, so we have to add gain to Q6 to make up for that. How much gain should Q6 have then?

Fast transients can almost always result in clipping. Therefore, the gain of Q6 should be adjustable - one approach would be emitter bypassing, but since you probably want an output volume control anyways, wiring up an logarithmic 20-100k pot between Q4 and Q6 is a reasonable solution.You need to decouple it on both sides, preferably with 1uF or more. Hook up the CCW leg to ground. connect the CW leg to Q4 collector with a cap in series, and the wiper to Q6 base, also with a cap in series. If polarized, the negative sides should be towards the potentiometer. Then, you can increase the gain of Q6 by using the same resistor values as are around Q5 (or different ones, depending on your needs).

While this doesn't affect the sidechain (Q6 loads Q5 just a little bit, it shouldn't really matter), it does affect the color introduced by the discrete amplifiers a little bit - probably not in a way that you'd find disappointing though. It is also possible to remove Q6 entirely and put some gain in the output OPA buffer instead, but we assume you might want to retain a bit of that common emitter follower nonlinearity. It's just a miniscule amount of color, but still.

All the best!

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Post by kizzer »

Hi there

Thanks very much for putting up the Schematic, I have wanted to have a go with this box for a while!

I'm just finishing off a stripboard layout for this, this will be only my 2nd layout after previously tracing and making a layout of an old Shin-ei Fuzz Wah. That one worked! But, this schematic is a bit of a step up for a novice like me.

There were a couple of questions I had about the circuit if you wouldn't mind.

Should C8 be flipped so the positive side is connected to Q5 Base?

Are B1, B2 and B3 of the Threshold DPDT connected together, or is R10 just connected from A2 to B2?

Cheers!

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Post by stolen »

kizzer wrote: 03 Apr 2021, 18:00
Should C8 be flipped so the positive side is connected to Q5 Base?
The negative side should be connected to Q5 base.
kizzer wrote: 03 Apr 2021, 18:00
Are B1, B2 and B3 of the Threshold DPDT connected together, or is R10 just connected from A2 to B2?
Yes, it appears as if the second level of the switch is completely shorted and therefore unnecessary, we didn't notice before! It's really just a switchable attenuator and might as well be a potentiometer. In the original schematic both levels are tied together for enhanced mechanical ruggedness, but no electrical reason whatsoever.

Have fun building!

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Post by kizzer »

Thanks for the reply!

So, Regarding the Threshold DPDT Pins 1,4,5 & 6 are linked together with R12 between Pins 3 & 6?

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Post by stolen »

Yeah, but an SPDT can do the job as well, the second pole doesn't do anything in this config. Also it's an on/off/on switch :D.

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Post by kizzer »

I've got my layout finished. I've been over it a few times now and would value a second set of experienced eyes to check it though.
So, if someone is able to give it a check against the schematic that would be great.

(If this needs to be moved to another part of the forum let me know cheers!)

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Post by stolen »

Sorry, we don't really have the mental capacity for that right now - but just go for it we'd say, even if there's a mistake the component density is low enough that you should be able to fix it after assembly and testing :D.

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Post by bow_and_error »

Hi kizzer,

Apologies for not updating this, I had to go learn how BJTs & FETs as variable resistors worked before I could kinda figure out what I needed to change.

Thanks for making that layout! I'm terrible at making vero layouts & have only done a very space-inefficient perf layout of an early version of this circuit. If you want to update your vero layout with the changes below, I'll build it and verify it!

On the switch, it's probably not clear on the schem, but the original 500-series wasn't super clear either. Basically in the off position, nothing is connected, so the 47k forms a voltage divider with the 22k. In one position, it's shorted, bypassing the 47k. In the other, the 13k is a parallel resistor with the 47k, then forming a voltage divider with the 22k. It's just 3 different attenuators that give you 3 Threshold options. It could probably be a pot, but I like the sound of the original, so I kept it. Feel free to simplify it if you have a better feel for it.

I took stolen's advice and made some changes that sounded good.
  • Swapped the polarity of C8 - as you mentioned as well
  • R18 is now 22k (like the original Shure schematic) - this provides a LOT more gain, but seems to be necessary to get "that sound"
  • Added a switchable pad at the input (modelled after irfrench's 500-series pad) - This was necessary to get the input into a range that allowed for the increased gain due to R18 & helps in dealing with different input signals
  • Preferred JFET is now 2N5458 - This has less distortion as a variable resistor & really cleans up the sound on my breadboard. It still works with a 2N5457, but may get a little hairy at ball-to-the-walls levels of compression.
Here is an updated schematic with those changes:
Image

What's not on the schematic is that I've been using it without the output buffer as it seems to sound a lot better & reduces the amount of distortion. I'd like to remove the dual opamp & add a BJT-based input buffer, but I don't know if designing a high-impedance input for that buffer will prevent me from getting a low enough output impedance to interface with the rest of the circuit. Maybe stolen can chime in on that?

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Post by kizzer »

Thanks for all your hard work on this, I will have a look through and adapt the vero to suit.

So, output wise, your just going from C11 to the output?

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Post by bow_and_error »

Yeah, just C11 to output.

By the way, R44 on that most recent schematic should be a 20R instead of a 10R. It's not crucial, it just determines how much attenuation you get on that side of the Pad switch.

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Post by kizzer »

Great, so moved a few things around and had to add a line, but this seems to work. To omit the output buffer, just get rid of R40 and C20 and move C11 (-) to 16C.

Hopefully this layout is good, I'm a novice at this, so hopefully I got the power section right.

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Post by bow_and_error »

Thanks man! I'm terrible at making vero layouts from scratch, so I really appreciate it.

I was reviewing the layout & found a few things. I fixed the connectivity around the JFET, C6, & added the feedback jumpers for the opamp buffers. I was able to squeeze it down to a little smaller as well.

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Post by kizzer »

That's great! Thanks for checking it through and correcting the mistakes. This has been a really good learning experience for me over the past week.

Can't believe I got the JFET pin out wrong! Just went with the schematic on that one instead of checking, so lesson learned on that.
Didn't know about the feedback jumpers having to be manually linked, so another lesson learned.
Regarding C6, I take it without the cut, R14 is connected to Q4, R15, C7, R16 etc?

Just from a connectivity point of view, I see you have the collector of Q8 linked directly to the collector of Q9 rather than direct to release 2 (28/21). I know that it still connects to C14, R35 and R2, but I'm guessing both would work here?

Anyway, this is great, thanks so much for working on it and putting up the schematic in the first place. I've always been interested in it and nearly bought an original unit a few years back, but I couldn't justify the purchase at the time! Should have the parts next week, so will give it a go. Let me know how your build goes and if you take out the buffered output.

Cheers!

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Post by bow_and_error »

No problem, mate! Your layout is really compact for the amount of components on the board, that's always a huge challenge for me.

JFETs come in all sorts of pinouts: DSG, DGS, GSD, etc., so I just changed it to the most common one for the 5458/5457. I've had to cross-over pins plenty of times to match the weirdo pinout on 2SK-series FETs.

You've got it on the C6 cut. This just forces the signal through the cap rather than giving it a short circuit around it.

The collectors of Q8 & Q9 form a "node" with Release 2, C14+, R35, & R2, meaning they are all connected. Because vero tracks & jumpers are essentially short circuits, you can connect or daisy chain them in any way and the result is the same.

I'm still pretty new to DIY Layout Creator, but recently discovered the "Highlight Connected" feature. It lets you click on a component or trace and it will highlight in green any areas that are connected at the same node. It was really helpful for checking the right connectivity on the layout.

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Post by kizzer »

bow_and_error wrote: 09 Apr 2021, 14:54 I'm still pretty new to DIY Layout Creator, but recently discovered the "Highlight Connected" feature. It lets you click on a component or trace and it will highlight in green any areas that are connected at the same node. It was really helpful for checking the right connectivity on the layout.
Ha Ha, just had a look at this, that's a great tip!

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