Jfet design questions

[stole59]

Thanks grrrunge.
If I'm working on jfet stage and connect 1M resistor to ground, 100k in series with incoming signal and Jfet's gate voltage divider is between 1M and 100K?
But if I don't connect any resistor to ground will there will be any attenuation or no because of infinite resistance to ground?

[DrNomis]

Thanks grrrunge.
If I'm working on jfet stage and connect 1M resistor to ground, 100k in series with incoming signal and Jfet's gate voltage divider is between 1M and 100K?
But if I don't connect any resistor to ground will there will be any attenuation or no because of infinite resistance to ground?

Assuming that you mean connecting a 1M resistor from the Gate of the Fet to circuit ground, a 100k resistor in series with the incoming circuit will probably attenuate the signal by a very small amount, that 100k resistor is in series with the 1M resistor and will form a 10:1 voltage-divider (100k is one tenth of 1M), but, the input impedance of a Fet is something like 10M when biased properly, furthermore, a Fet is a Voltage-Amplifying device like a Valve or Tube, the Gate draws very little current from the preceding amplifying stage.....

[soulsonic]

Two important things that have been completely overlooked in this thread so far:

1: Please stop using trimmers in place of Drain resistors to "set the bias". That's the most poor way to do it and really bad design practice. You can design it with fixed values that will likely give you consistently even bias with a given JFET type. (check out the schematic for the Fetto) If you have trouble with JFETs having too much variance for fixed values, you can make a variable voltage divider that biases the JFET via the Gate resistor - THIS IS 100000x BETTER! If you have trimmers as you're Drain resistors, you're going to have very inconsistent sound from different builds because you will end up with different Drain load values, and therefore, different gain and impedance characteristics with each different build! PLEASE STOP DOING THIS!!!!

2: There IS a limit to the number of effective stages in a circuit, if you don't do it right. When you have more than three gain stages in a circuit, you should decouple the power to the different stages with RC. You see this in every old tube amp design... the resistors in series with the power supply with each subsequent stage ISN'T just to "drop the voltage" for the earlier preamp stages - it is performing this crucial task of decoupling. In a transistor circuit like this where the relative voltages are low, this decoupling doesn't have to be in series, the RC decoupling can fan out in parallel from the power supply.
The purpose of this decoupling is to stop "Degenerative" feedback from happening through the power rails. The result of this feedback is a loss of gain and potential stability problems (if you stumble into a situation where the feedback happens to be "regenerative"...).

[DrNomis]

Better still, have a look at the Catalinbread Dirty Little Secret circuit, some of the gain-stages use two Fets rather than one, this does at least three things, firstly it maximises the gain you can get, secondly the output impedance is lower, thirdly the output sits at very close to half the supply voltage....


I think R.G.Keen has an article on his website about that circuit configuration, have a good read of it.......

[stole59]

Two important things that have been completely overlooked in this thread so far:

1: Please stop using trimmers in place of Drain resistors to "set the bias". That's the most poor way to do it and really bad design practice. You can design it with fixed values that will likely give you consistently even bias with a given JFET type. (check out the schematic for the Fetto) If you have trouble with JFETs having too much variance for fixed values, you can make a variable voltage divider that biases the JFET via the Gate resistor - THIS IS 100000x BETTER! If you have trimmers as you're Drain resistors, you're going to have very inconsistent sound from different builds because you will end up with different Drain load values, and therefore, different gain and impedance characteristics with each different build! PLEASE STOP DOING THIS!!!!

2: There IS a limit to the number of effective stages in a circuit, if you don't do it right. When you have more than three gain stages in a circuit, you should decouple the power to the different stages with RC. You see this in every old tube amp design... the resistors in series with the power supply with each subsequent stage ISN'T just to "drop the voltage" for the earlier preamp stages - it is performing this crucial task of decoupling. In a transistor circuit like this where the relative voltages are low, this decoupling doesn't have to be in series, the RC decoupling can fan out in parallel from the power supply.
The purpose of this decoupling is to stop "Degenerative" feedback from happening through the power rails. The result of this feedback is a loss of gain and potential stability problems (if you stumble into a situation where the feedback happens to be "regenerative"...).

Thanks Soulsonic. That was very insightful. I didn't totally understand but I would like to try biasing gate resistor like you said if this would give me consistent sound in my future builds.

I have few questions about tailoring mu amp gain stages:
- I wanted a mu amp gain stage that will boost signal frequencies over 600hz. What capacitor values (C2 and C3) should I use on schematic shown on the next picture?

- Some mu amp designs don't have R3 and this does. Does it mean that jumper instead od R3 would give maximum gain and resistor lower value? Can this gain be calculated?

BTW Thank you all for your patience and knowledge you passed, this means a lot to me and other beginners reading this forum.

Here is the picture

[stole59]

Can anyone help me with this please?

[soulsonic]

changing that value does change the gain, and a lower value would give more gain. but that changes other factors as well, not just gain. and there are other ways to change the gain of the circuit without changing the value of the Source resistor. C3 is the Source bypass cap, which has the same effect of increasing the gain of AC signals, but unlike changing the value of R3, it does't affect any of the DC characteristics of the circuit. The reason for having different values for C3 is to shape which frequencies have what gain... it's a matter of the capacitor's relationship to R3... a larger capacitor will bypass lower frequencies - a sufficiently large one (like, say, 47uF) would extend the frequency response enough that it would be giving max gain at all frequencies, and as far as the AC signal is concerned, it would be like R3 were a short straight to ground. Using a smaller value for C3, like 100n, wouldn't be enough to bypass low frequencies, so only higher frequencies would have higher gain - this would give it a brighter sound. And you can put resistors in series with the bypass caps to control exactly how much gain you have in the circuit, and you can even have multiple caps with different resistor values in series with them to give it a even more precisely shaped response.

[soulsonic]

Sorry, I can't really help with the math...
Maybe you can find some good info here: http://people.seas.harvard.edu/~jones/e ... ure_4.html
and more generally here: http://people.seas.harvard.edu/~jones/es154/
This is probably a reliable source of info.

[HENK]

BIASING: isn`t it the SOURCE with the variable Voltage Divider(not the Gate)?????

[soulsonic]

You can use a variable Source resistor as a method of biasing, but you still run into the problem of potentially changing the gain and frequency response of the circuit. Using a variable voltage divider feeding a bias voltage via the Gate resistor allows you to adjust the bias without affecting the intended gain or frequency response.

[DrNomis]

BIASING: isn`t it the SOURCE with the variable Voltage Divider(not the Gate)?????

Usually, a single Fet is biased the same general way as you would bias a Triode stage, the Gate of the Fet would be connected to circuit ground via a very high value resistor (1M to 10M), the Source would be connected to circuit ground via a lower value resistor (100 Ohms to 10k) and the drain would be connected to the +V supply via a suitably sized resistor (this is assuming that the Fet is configured as a Common-Source amplifier stage), the way it works is like this, initially when power is first applied the Fet is fully conducting with the current flowing from the circuit ground through the source to the drain and then to +V supply, the source and drain resistors limit how much current can flow when the Fet is turned fully on, now, the voltage drop across the source resistor raises the source so it is at a more positive potential with respect to the gate (the gate is at zero volts due to it being tied to the circuit ground via the gate to ground resistor), because the source is now at a potential more positive than the gate, this acts as if the gate is biased more negatively and turns the Fet more off, eventually the Fet reaches a state where the voltage on the drain is roughly half the supply voltage (assuming it is biased for linear operation)......

[stole59]

Soulsonic, can you explain to us how to make a variable voltage divider that biases the JFET via the Gate resistor?

For example, if I use J201 for gain stage, 1k resistor between source and ground (usual value), 10k between drain and 9v how would I bias Jfet via gate resistor? would I use trimpot instead of 1M between gate and ground?
Thanks

[soulsonic]

Like this.

Simple JFET biasing

And this basic topology can be used for numerous other transistor circuits.

[Groovenut]

Would this bias arrangement change the input impedance of the stage?

[stole59]

Wow man, I never saw anything like this in Jfet pedal design. Thanks alot, I will try this in overdrive I am working on

[soulsonic]

Would this bias arrangement change the input impedance of the stage?

It shouldn't, as long as C1 is a large enough value that AC signals will think that R3 is connected directly to ground.

[soulsonic]

Wow man, I never saw anything like this in Jfet pedal design.

My Shizzle Deluxe Fuzz/Overdrive uses this technique for the JFET input stage. In this case, the bias isn't adjustable, because it consistently gives the right biasing with these values with this transistor...
You will also see this in some of the Russian-designed JFET circuits.

JFET input stage of the Shizzle Deluxe

[soulsonic]

Check this: https://www.freestompboxes.org/download/ ... p?id=21744
JC 120 using this same kind of JFET biasing...

[stole59]

Thanks Soulsonic. My brain felt overloading when I opened that PDF file

This concept definitely improves Jfet design because it offers consistency in sound which is very important.
I wanted to make higher gain overdrive with three blocks, first standard jfet gain stage, second Mu amp jfet stage and third recovery stage (buffer after passive tone control), this will help a lot.

[stole59]

Another Jfet design question:
Is this a gain stage and if it is what is the difference between this and regular jfet gain stage We already talked about?