Wampler style voltage divider ?
Can someone explain why Wampler in his some designs use a voltage divider for each half of IC's? In this schematic in att. is a two. In Plexitortion he use a four.
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~arph
- Cap Cooler
I could only say he does it to keep Vref ripple caused by either opamp away from the other. (both Vrefs have filter caps too). Might make sense on a high gain pedal.
EDIT: You can see that the Vref of the first opamp is also connected to the output of the opamp stage.
EDIT: You can see that the Vref of the first opamp is also connected to the output of the opamp stage.
In the quiet words of the virgin Mary: "Come again?"
I suspect that it's habit or layout that drives this one.
References have some very peculiar issues, and using multiples has some virtues, but the differences are subtle. You can trick yourself without meaning to. It gets difficult to figure out what is what sometimes. For instance, in this circuit, what it the reference voltage that IC1B actually sees?
It is NOT The DC voltage presented by R24 and R25. Those two have a hand in it, all right, but pin 5 sees a 1K resistor to the DC voltage at pin 1. Pin 1 is at a DC voltage that is the buffered version of the voltage at pin 3, with essentially zero impedance, +/- the input and offset errors of IC1A and its noise in amplifying/buffering it. Pin 5 sees a 15K resistance to the DC voltage at C14 (10K plus the Thevenin equivalent of R24 and R25), so the voltage at C14 has 1/15th the effect on pin 5 that pin 1 does. Notice that C14 also has 1/10th the decoupling effect on pin 5 that pin 1 does, so C14 really doesn't help with reducing noise from pin 1 very much. There are some minor effects on the bias voltage and decoupling of pin 5 from the volume pot and from R17 and R16 as well. Notice that the R16/Volume/R13 loop provides positive feedback to the extent that it's not decoupled by C14 or squashed by the stranglehold that pin 1 and R9 have on pin 5.
What this dual bias setup does do it to remove loading effects from things connected to C14 from affecting the voltage at C13 - if any. It is not always clear without really digging into what is connected to what to decide what does what with bias voltages, especially ones with resistor/resistor setups for generating the DC voltage in the first place. 5K is not all that low a DC impedance for a bias source.
Then too, buffering a bias with an opamp stage must be done carefully to avoid letting the noise from the actual bias generator and the opamp that buffers it get loose and feed noise to all the things being biased, and avoid oscillation tendencies in the circuits buffering the bias.
There is really no substitute for analyzing your circuits and knowing what each part really does, not simply figuring you can hang another bias generator in there. At best, you get good results without letting one part of the circuit pollute another. At worst, you get oscillation and non-function. Most of the time you don't really know what you get, but you get away with it without doing much mental work.
Shrug. I ain't afraid of no ghost.
References have some very peculiar issues, and using multiples has some virtues, but the differences are subtle. You can trick yourself without meaning to. It gets difficult to figure out what is what sometimes. For instance, in this circuit, what it the reference voltage that IC1B actually sees?
It is NOT The DC voltage presented by R24 and R25. Those two have a hand in it, all right, but pin 5 sees a 1K resistor to the DC voltage at pin 1. Pin 1 is at a DC voltage that is the buffered version of the voltage at pin 3, with essentially zero impedance, +/- the input and offset errors of IC1A and its noise in amplifying/buffering it. Pin 5 sees a 15K resistance to the DC voltage at C14 (10K plus the Thevenin equivalent of R24 and R25), so the voltage at C14 has 1/15th the effect on pin 5 that pin 1 does. Notice that C14 also has 1/10th the decoupling effect on pin 5 that pin 1 does, so C14 really doesn't help with reducing noise from pin 1 very much. There are some minor effects on the bias voltage and decoupling of pin 5 from the volume pot and from R17 and R16 as well. Notice that the R16/Volume/R13 loop provides positive feedback to the extent that it's not decoupled by C14 or squashed by the stranglehold that pin 1 and R9 have on pin 5.
What this dual bias setup does do it to remove loading effects from things connected to C14 from affecting the voltage at C13 - if any. It is not always clear without really digging into what is connected to what to decide what does what with bias voltages, especially ones with resistor/resistor setups for generating the DC voltage in the first place. 5K is not all that low a DC impedance for a bias source.
Then too, buffering a bias with an opamp stage must be done carefully to avoid letting the noise from the actual bias generator and the opamp that buffers it get loose and feed noise to all the things being biased, and avoid oscillation tendencies in the circuits buffering the bias.
There is really no substitute for analyzing your circuits and knowing what each part really does, not simply figuring you can hang another bias generator in there. At best, you get good results without letting one part of the circuit pollute another. At worst, you get oscillation and non-function. Most of the time you don't really know what you get, but you get away with it without doing much mental work.
Shrug. I ain't afraid of no ghost.
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J0K3RX
- Degoop Doctor
Amptweaker / James Brown does this same thing (minus the filter caps) on the Tight Metal, Tight Rock, Fat Rock and probably the whole pedal line up... I tried them using the same voltage divider and I didn't notice any audible differences. What I did notice was on the Amptweaker pedals is that the layout is VERY congested. Maybe he added the extra voltage dividers to be more localized to their respective points?
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indyguitarist
- Resistor Ronker
Nope, it's intentional.R.G. wrote:I suspect that it's habit or layout that drives this one.
References have some very peculiar issues, and using multiples has some virtues, but the differences are subtle. You can trick yourself without meaning to. It gets difficult to figure out what is what sometimes. For instance, in this circuit, what it the reference voltage that IC1B actually sees?
It is NOT The DC voltage presented by R24 and R25. Those two have a hand in it, all right, but pin 5 sees a 1K resistor to the DC voltage at pin 1. Pin 1 is at a DC voltage that is the buffered version of the voltage at pin 3, with essentially zero impedance, +/- the input and offset errors of IC1A and its noise in amplifying/buffering it. Pin 5 sees a 15K resistance to the DC voltage at C14 (10K plus the Thevenin equivalent of R24 and R25), so the voltage at C14 has 1/15th the effect on pin 5 that pin 1 does. Notice that C14 also has 1/10th the decoupling effect on pin 5 that pin 1 does, so C14 really doesn't help with reducing noise from pin 1 very much. There are some minor effects on the bias voltage and decoupling of pin 5 from the volume pot and from R17 and R16 as well. Notice that the R16/Volume/R13 loop provides positive feedback to the extent that it's not decoupled by C14 or squashed by the stranglehold that pin 1 and R9 have on pin 5.
What this dual bias setup does do it to remove loading effects from things connected to C14 from affecting the voltage at C13 - if any. It is not always clear without really digging into what is connected to what to decide what does what with bias voltages, especially ones with resistor/resistor setups for generating the DC voltage in the first place. 5K is not all that low a DC impedance for a bias source.
Then too, buffering a bias with an opamp stage must be done carefully to avoid letting the noise from the actual bias generator and the opamp that buffers it get loose and feed noise to all the things being biased, and avoid oscillation tendencies in the circuits buffering the bias.
There is really no substitute for analyzing your circuits and knowing what each part really does, not simply figuring you can hang another bias generator in there. At best, you get good results without letting one part of the circuit pollute another. At worst, you get oscillation and non-function. Most of the time you don't really know what you get, but you get away with it without doing much mental work.
Shrug. I ain't afraid of no ghost.
